As recent semiconductor memory devices become more integrated, the LSI devices become increasingly more compact. The more compact LSI devices request not only a smaller line width, but improved dimension and position accuracies of the circuit patterns. So, a ReRAM (Resistive RAM) is proposed that uses, as a memory, a variable resistance element that reversibly changes the resistance. Then, it is believed that the memory cell array can become more highly integrated by a structure of the ReRAM in which the variable resistance element is provided between side walls of word-lines extending in parallel with a substrate and side walls of bit-lines extending perpendicular to the substrate. Unfortunately, the memory cells connected to the bit-lines may have variation in their characteristics.